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Öğe 130nm DC-DC SEPIC Design and ,Analysis for Energy Harvesting Applications(IEEE, 2020) Guzeltepe, Ismail; Vural, Revna Acar; Batur, Okan ZaferSEPIC converters, which are becoming widespread in several areas, including renewable energy; are often preferred due to non-inverted output, non-excessive switch stress and considerably less input current ripple. However, there are not enough studies in the literature on the use of the SEPIC converters in ultra-low voltage applications. In this study; It is aimed to design the effective use of DC-DC SEPIC converters consisting of integrated active components for very low voltage energy harvesting applications. In this context; using UMC 130nm technology; A DC-DC SEPIC converter, capable of providing a constant IV output with an input voltage range of 150mV-1.6V and offering an output power range of 1.3-7.7mW with 80% efficiency, has been designed and analyzed.Öğe A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS(Springer, 2022) Aydogdu, Atakan; Tomar, Deniz; Batur, Okan Zafer; Dundar, GunhanIn this paper, an on-chip planar balun and a common-gate (CG) low-noise amplifier (LNA) employing a multiple feedback structure is presented. The planar interleaved balun is characterized through electromagnetic (EM) simulations using Advanced Design System (ADS) Momentum. A new lumped circuit model of the balun is created for use in transient simulations. CG-LNA employs g(m)-boosting and positive feedback structures to reduce the high noise figure (NF) of the traditional CG-LNA. The combined blocks achieve a minimum NF of 5.5 dB and an AC gain of 18.54 dB in post-layout simulations. The balun and LNA blocks are designed in a 180 nm CMOS technology using 1Poly6Metal (1P6M) layers. Simulation results are presented for post-layout and schematic cases. The total power consumption of the the circuit is 2.55 mW with 1.8 V nominal power supply. Furthermore, a time-domain UWB pulse simulation is done to confirm the operation of the blocks combined. These can be used to form the initial stages of an UWB receiver.Öğe Design and Comparison of Low Power Pulse Combining IR-UWB Transmitters in 180nm CMOS(IEEE, 2019) Ramazanoglu, Semih; Dundar, Gunhan; Batur, Okan ZaferThis paper presents design and comparison of low power pulse shaping methods for achieving low energy per pulse (EPP), Impulse Radio Ultra-Wideband (IR-UWB) transmitter. The proposed transmitters are composed of all digital single pulse generator, multiple delay lines, a pulse combination circuit, and pulse shaping stages with a pulse shaping capacitor and wire-bond inductor at the output. The generated mono pulse width and the consecutive mono pulse positions are determined by the delay lines. The proposed transmitter architectures are designed in 180 nm CMOS technology, and supply voltage is 1.8V. The simulation results show that the energy required to generate the Gaussian mono-cycle, triplet, and quintuplet pulses are 10.5 pJ, 22.15 pJ, and 36.5 pJ respectively at 200 MHz pulse repetition frequency (PRF) without band pass filter (BPF). The required energies utilizing a BPF to generate output signals are 17.5 pJ, 31.5 pJ, and 46 pJ respectively.Öğe High accuracy potentiostat with wide dynamic range and linearity(Elsevier Gmbh, 2021) Toprak, Serdar; Vural, Revna Acar; Batur, Okan ZaferElectrochemical measurement require potentiostat to ensure the operational stability during the sensing and conversion of the sensor signals. This article presents a potentiostat circuit with high linearity and accuracy bidirectional current readout circuit for a wide dynamic current range. A current conveyor circuit with a wide current range from +/- 50 nA to +/- 400 mu A is constructed by combining a low-noise current mirror based OTA and a regulated current mirror employing accurate and linear output characteristics. The potentiostat is designed in 0.18 mu m TSMC technology with +/- 0.9 V nominal power supply, and the results obtained are based on simulation and performed with Cadence (TM) tools. The potentiostat circuit achieves a minimum detectable current of 1 nA within current range of +/- 400 mu A. The detectable current range is 112 dB with R-2 linearity of 0.999999993 and maximum error of 1.3%. The input referred noise of the current conveyor is 24.48 fA/root Hz@1 kHz, and integrated referred noise is 0.912 pA within 0.01 Hz - 1 kHz bandwidth. The static power consumption of the potentiostat circuit is 1.993 mW. The control amplifier and the current readout circuit consume 1.98 mW and 13 mu W, respectively. The proposed circuit is capable of providing low noise and high accuracy current measurement with low power consumption and highly linear output characteristics.Öğe LNA-ESD-PCB Codesign for Robust Operation of IR-UWB Non-coherent Receiver(IEEE, 2017) Batur, Okan Zafer; Dundar, Gunhan; Koca, MutluIn this paper, we present a radio frequency (RF) front-end design for increasing robustness of non-coherent energy detection based impulse radio (IR) ultra-wideband (UWB) receivers in impulsive noise environment. Robustness against impulsive noise is achieved by on chip LNA-bandpass filter (BPF) circuit, which also works as a clipper for high energy impulsive noise bursts. The electrostatic discharge (ESD), wirebond, pad capacitance, and the chip package model are co-designed with wideband cascode LNA structure. These unwanted capacitive and inductive elements are designed as a part of input BPF. The LNA output stage includes an inductor that is coupling with the input capacitance of the VGA block results in additional filtering. In the post-layout simulations, 45 dB impulsive noise compression has been achieved. It has been shown that the RF front-end and LNA output stage reduces the impulsive noise and increases the noise performance of the IR-UWB receiver, hence becoming robust against the impulsive noise.Öğe MATLAB & VHDL-AMS Co-Simulation Environment for IR-UWB Transceiver Design(IEEE, 2016) Batur, Okan Zafer; Dundar, Gunhan; Koca, MutluThis paper presents a MATLAB-VHDL-AMS computer aided design automation flow for the design of an IR-UWB transceiver. The co-simulation environment helps the user to create the transceiver system in a top-down design methodology. The constructed CAD flow enables the user to analyze the performance of the system with the aid of BER vs LB/No figures. The effect of system and circuit level parameters on the system performance can be analyzed and these parameters can be determined from the model. The transceiver system model is based on circuit parameters such as gain, linearity, and reflection coefficient. The individual system blocks can be interchanged with actual circuit designs. Therefore, the performance of these individual blocks in a transceiver system can also be studied.Öğe The segmented UEC Food-100 dataset with benchmark experiment on food detection(Springer, 2023) Sonmez, Elena Battini; Memis, Sefer; Arslan, Berker; Batur, Okan ZaferAutomatic food classification systems have several interesting applications ranging from detecting eating habits, to waste food management and advertisement. When a food image has multiple food items, the food detection step is necessary before classification. This work challenges the food detection issue and it introduces to the research community the Segmented UEC Food-100 dataset, which expands the original UEC Food-100 database with segmentation masks. In the semantic segmentation experiment, the performance of YOLAC and DeeplabV3+ has been compared and YOLAC reached the best accuracy of 64.63% mIoU. In the instance segmentation experiment, YOLACT has been used due to its speed and high accuracy. The benchmark performance on the newly released Segmented UEC Food-100 dataset is 68.83% mAP. For comparison purpose, experiments have been run also on the UEC FoodPix Complete dataset of Okamoto et al. The database and the code will be available after publication.Öğe Switched Capacitor Variable Delay Line(IEEE, 2018) Ramazanoglu, Semih; Batur, Okan ZaferIn this paper, we present a new configurable switched capacitor loading technique to achieve a shunt capacitor variable delay line with reduced capacitor area. Proposed delay line employs only two configurable and switchable capacitors to achieve the required delay value. Thermometer coded capacitors are utilized for linear and nondecreasing delay. The proposed architecture has high linearity figures with 0,0104 DNL & 0,0618 INL. The delay steps can be configured with 100 pS/step. Maximum delay range of the 10 cascaded delay cells is 10 nS. The delay cells can be activated separately to increase the control over the required delay range. The maximum operating frequency of a single delay cell is 90 MHz. The delay line architecture is designed in UMC 180 nm CMOS technology and simulation results are presented. The circuit operates with 1.8 V supply and the core delay cell consumes 95 mu W at 10 MHz PRF. The delay line with 10 cascaded delay cells consumes 536 mu W at 5 MHz PRF. Achieved linearity value of R-2 is 0,9999.Öğe Synchronisation free non-coherent on-off keying demodulation techniques(Inst Engineering Technology-Iet, 2019) Batur, Okan Zafer; Pekcokguler, Naci; Dundar, Gunhan; Koca, MutluDigital envelope detection, self-correlation and high frequency sampling techniques are proposed for high data rate demodulation of on-off keying signals that are widely used in impulse radio ultra-wideband receivers. The proposed designs eliminate the requirement of complex synchronisation circuit architectures and algorithms. The presented circuits are all digital and can be utilised in the baseband synchronisation. The digital envelope detection and self-correlation methods are implemented in 130 nm complementary metal oxide semiconductor (CMOS) technology and concepts are verified with measurement results. Post-layout simulation results are given for the high frequency sampling technique. Measurements show that the digital envelope detector demonstrates successful operation up to 600 Mbps data rate with 2.1 mW power consumption. The self-correlator consumes 10 mW with 100 Mbps data rate in the measurements. The post-layout simulations results show that the high frequency sampler can operate at 2 mW with 500 Mbps data rate.Öğe Ultra Low Power All-Digital CMOS Sensor Read Out Circuit for Optically Powered Biomedical Systems(IEEE, 2016) Yelkenci, Asli; Batur, Okan Zafer; Sarioglu, BaykalIn this paper, an ultra low power all digital sensor read out circuit architecture which requires very low power is proposed. The proposed circuit is targeted for optically powered biomedical applications. The read-out circuit is utilized for the measurement of capacitive and resistive type of transducers. The measurement method is based on the fact that both capacitive and resistive sensors can be utilized to introduce delay in the signal transmission path. The proposed circuit architecture is composed of entirely digital components and it measures the introduced delay using only single input clock signal. The proposed architecture is implemented on UMC 180 nm CMOS technology and simulation results are presented. The proposed circuit operates with 1.2 V supply that is generated by the optical power harvesting and charge pump unit, while consuming 70.4 mu W. The results confirm that the proposed circuit can be utilized in optically powered biomedical applications for carrying out capacitive and resistive sensor measurements.Öğe An ultra-low power configurable IR-UWB transmitter in 130nm CMOS(Springer, 2019) Batur, Okan Zafer; Dundar, Gunhan; Koca, MutluIn this paper, an ultra-low power and configurable IR-UWB transmitter is presented. The center frequency can be tuned from 500MHz to 4.1GHz. The configurability is achieved by the digitally programmable shunt capacitor delay elements. Shift registers are used to configure the delay lines and to minimize the number of pins used. The transmitter is capable of achieving 600MHz pulse repetition frequency (PRF) with a 9.6 pJ/pulse performance at 4GHz center frequency in the 3.1-5GHz band. The standby power consumption is 1.8 mu W.Öğe Wireless Readout System Modeling for Electrodeless QCM(IEEE, 2019) Sari, Ahmet; Batur, Okan Zafer; Kirimli, CeyhunIn this paper, we present a wireless and electrode-less Quartz Crystal Microbalance (WE-QCM) sensor measurement system. The QCM characteristics are measured using a network analyzer and microstrip antennas and the results are modeled by Butterworth Van Dyke (BVD) electrical equivalent circuit model. The WE-QCM model and the proposed energy detection transceiver based wireless measurement system are simulated using analog mixed signal (AMS) tools. The mixed signal simulations show that less than 0.5 kHz sensitivity in frequency variations can be achieved with the proposed system model.