A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS
dc.authorid | Dundar, Gunhan/0000-0003-2044-2706|batur, okan zafer/0000-0002-1585-1794 | |
dc.authorwosid | Dundar, Gunhan/Q-1648-2015 | |
dc.authorwosid | batur, okan zafer/L-3251-2018 | |
dc.contributor.author | Aydogdu, Atakan | |
dc.contributor.author | Tomar, Deniz | |
dc.contributor.author | Batur, Okan Zafer | |
dc.contributor.author | Dundar, Gunhan | |
dc.date.accessioned | 2024-07-18T20:40:38Z | |
dc.date.available | 2024-07-18T20:40:38Z | |
dc.date.issued | 2022 | |
dc.department | İstanbul Bilgi Üniversitesi | en_US |
dc.description.abstract | In this paper, an on-chip planar balun and a common-gate (CG) low-noise amplifier (LNA) employing a multiple feedback structure is presented. The planar interleaved balun is characterized through electromagnetic (EM) simulations using Advanced Design System (ADS) Momentum. A new lumped circuit model of the balun is created for use in transient simulations. CG-LNA employs g(m)-boosting and positive feedback structures to reduce the high noise figure (NF) of the traditional CG-LNA. The combined blocks achieve a minimum NF of 5.5 dB and an AC gain of 18.54 dB in post-layout simulations. The balun and LNA blocks are designed in a 180 nm CMOS technology using 1Poly6Metal (1P6M) layers. Simulation results are presented for post-layout and schematic cases. The total power consumption of the the circuit is 2.55 mW with 1.8 V nominal power supply. Furthermore, a time-domain UWB pulse simulation is done to confirm the operation of the blocks combined. These can be used to form the initial stages of an UWB receiver. | en_US |
dc.identifier.doi | 10.1007/s10470-022-01997-1 | |
dc.identifier.endpage | 234 | en_US |
dc.identifier.issn | 0925-1030 | |
dc.identifier.issn | 1573-1979 | |
dc.identifier.issue | 2 | en_US |
dc.identifier.scopus | 2-s2.0-85124770021 | en_US |
dc.identifier.scopusquality | Q3 | en_US |
dc.identifier.startpage | 223 | en_US |
dc.identifier.uri | https://doi.org/10.1007/s10470-022-01997-1 | |
dc.identifier.uri | https://hdl.handle.net/11411/7154 | |
dc.identifier.volume | 111 | en_US |
dc.identifier.wos | WOS:000754353500001 | en_US |
dc.identifier.wosquality | Q4 | en_US |
dc.indekslendigikaynak | Web of Science | en_US |
dc.indekslendigikaynak | Scopus | en_US |
dc.language.iso | en | en_US |
dc.publisher | Springer | en_US |
dc.relation.ispartof | Analog Integrated Circuits and Signal Processing | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | Low Power | en_US |
dc.subject | On-Chip Passive Balun | en_US |
dc.subject | Differential | en_US |
dc.subject | 180 Nm | en_US |
dc.subject | Uwb | en_US |
dc.subject | Lna | en_US |
dc.subject | Spiral Inductors | en_US |
dc.subject | Circuit Model | en_US |
dc.subject | Transformers | en_US |
dc.subject | Design | en_US |
dc.title | A 2.55-mW on-chip passive balun-LNA in 180-nm CMOS | en_US |
dc.type | Article | en_US |